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Vol. 142, No. 7, July 2012, pp. 44-53

 

Bullet

 

Circuit of Data Aggregation on the Fly for WSN

 

M. DAOUI, M. LALAM, S. HAMRIOUI B. DJAMAH and D. Nouali

Université Mouloud Mammeri de Tizi-Ouzou, 15000, Algeria

Tel.: +213553092223

E-mail: mdaouidz@yahoo.fr

 

Received: 27 May 2012   /Accepted: 23 July 2012   /Published: 31 July 2012

Digital Sensors and Sensor Sysstems

 

Abstract: This paper describes a simple technique of data aggregation which limits data transfer time of sensors in wireless networks and provides an energy efficient solution for data acquisition and a band-width gain. This solution will be implemented in an FPGA-type embedded architecture for wireless sensors networks. The simplicity of our circuit make it suitable to equip a sensor, a clusterhead or a sink to aggregate the received data at the appropriate time by removing all redundant data collected downstream of the sensing circuit. The aggregated data are less bulky and refined for consumption.

 

Keywords: SN, Fusion, Aggregation, VHDL, FPGA

 

 

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