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Vol. 155, Issue 8, August 2013, pp. 247-254




The Low Power Design Model Based on RNS-FIR
Zijun Zhang, Guofeng Qin

The Department of Computer Science and Technology, Tongji University, 4800 Caoan Road, Shanghai, 201804, China
Tel.: 8621-65981423, fax: 8621-65981423
E-mail: jerry.7.good@163.com, gfqing@yahoo.com.cn


Received: 16 May 2013   /Accepted: 12 August 2013   /Published: 20 August 2013

Digital Sensors and Sensor Sysstems


Abstract: High power problem become one of the most important bottleneck of the IC industry. FIR filter is a most basic element in a digital signal processing system. In this paper, we managed to design a new FIR filter that can have low power. We use a residue number system to design a FIR filter in order to reduce power. In our model, we designed a serial modulus adder and a new way to compute modulus bit by bit. We use a way of looking up table in place of multiplication. By experiment verification, these methods in each module can effectively cut down the power and area.


Keywords: Low power, Filter, RNS, FIR, Modulus, Parallel, Prefix, Adder.


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