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Special Issue: Modern Sensing Technologies

Vol. 90, April 2008, pp. 276-283



An Improved CMOS Sensor Circuit Using Parasitic Bipolar Junction Transistors for Monitoring the Freshness of Perishables


S. M. Rezaul HASAN and Siti Noorjannah IBRAHIM

Center for Research in Analog and VLSI Microsystem dEsign (CRAVE),

Massey University, Auckland 1311, New Zealand

E-mail: hasanmic@massey.ac.nz, s.ibrahim@massey.ac.nz



 Received: 15 October 2007   /Accepted: 20 February 2008   /Published: 15 April 2008


Abstract: This paper presents an improved integrated circuit sensor for emulating and monitoring the quality of perishable goods based on the surrounding temperature. The sensor is attached to the container of fresh or preserved farm or marine produce and passes on the monitored quality information from manufacturer/producer to the consumers. The sensor essentially emulates the thermal deterioration caused by the environment on its way from producer to consumer and provides a readout indicating the freshness of the goods. Compared to previous designs, parasitic substrate PNP devices in standard CMOS process instead of subthreshold MOS devices are used for emulating the activation energy of degradation (spoiling) chemical reactions. The reliability of the sensor is thus considerably enhanced compared to previous design. In addition, an analog squaring circuit is used for emulating the degradation for large activation energy thereby removing the need for a multiplier in the digital processing section and hence reducing silicon area. Simulations were carried out using a 0.18 μm TSMC CMOS process technology. The power consumed by the sensor was around 16 mW.


Keywords: Food sensor, CMOS sensor, Parasitic bipolar devices, Freshness, Analog integrated circuits.


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