​ Abstract: Off-state leakage and reliability are greatly impacted by the parasitic bipolar transistor (PBT) effect in fully depleted (FD) silicon-on-insulator (SOI) MOSFETs, which becomes more noticeable with aggressive device scaling. This phenomenon is caused by band-to-band tunneling (BTBT) at the drain-channel junction, which allows excess hole formation when the rising channel potential lowers the energy barrier between the channel and source. A PBT route that increases the gate-induced drain leakage (GIDL) current is triggered by the ensuing hole injection. The interaction between substrate doping concentration and GIDL current amplification in FD SOI MOSFETs is thoroughly examined in this article. Under various substrate doping and back-bias settings, electrostatic potential profiles, carrier generation rates, and leakage current components were examined using two-dimensional TCAD simulations. Additionally, the impact of ambient temperature (300-400 K) on GIDL augmentation and PBT activation was systematically assessed. The findings show that while higher temperatures worsen the impact by raising BTBT production rates, higher substrate doping reduces PBT-induced leakage by decreasing potential modulation in the buried oxide region.

Keywords: Silicon-on-Insulator (SOI), Temperature, Metal–Oxide–Semiconductor Field-Effect Transistor (MOSFET), Fully depleted SOI MOSFETs, Parasitic Bipolar Transistor (PBT) effect, Gate-Induced Drain Leakage (GIDL).

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