Abstract:
Scaling FinFETs beyond the 10 nm technology node leads to worsened short-channel effects (SCEs) prompting a transition from the tri-gate architecture to a Gate-all-around (GAA) architecture. The nanowire type GAA offer superior electrostatic control, while wider nanosheets deliver higher ON current and superior switching speed. A novel GAA nanosheet device is developed in rectangular architecture utilising HfO
2
gate stack dielectric. A chronological design of GAA Nanosheet evolution from a single rectangular GAA to 3×2 and 2×3 Nanosheets are projected with (i) stacked gate high -k, (ii) gate underlaps in nanosheet (iii) variation in channel height and (iv) underlap wrapping with high-k (HfO2). The Ion/Ioff current ratio, transconductance, and SCEs such as subthreshold slope and DIBL are acquired for each device and compared with the 2 nm node IRDS 2022 for performance enhancement. On varying the channel height, the device with lesser height (Device I) displays more ON current and device with lesser width (Device H) provides enhanced short channel performances. Hence, the superior performances of the Stacked Nanosheet (SU-NS) FETs with high-speed switching brand them suitable for fast processors, RF circuits and related applications thus, equipped as the future device of the semiconductor industry.
Keywords:
Gate all around, Nanowire, Switching speed, Gate underlap, Stacked
nanosheet.
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